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Opened 12 years ago

Closed 12 years ago

#10787 closed defect (invalid)

RTL BUG

Reported by: h.maholingam@… Owned by: Hari Mahalingam
Priority: normal Milestone:
Component: general Version:
Severity: major Keywords:
Cc: Branch:
Release Notes:
API Changes:
Internal Changes:

Description (last modified by anonymous)

RTL Version 3982 FPGA Build version 7/27/12 release

I am working in this PPMU FPGA platfrom test. I didnot find connection REG between internal and external interrupt to CPU. There should be REG to address this port and so far I didnot find this REG. Could you help me?

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Change History (2)

comment:1 by anonymous, 12 years ago

Description: modified (diff)

comment:2 by Jun Omae, 12 years ago

Component: projectgeneral
Keywords: PPMU removed
Milestone: 1.0
Priority: highnormal
Resolution: invalid
Status: newclosed
Version: 1.0dev

WrongTrac or test ticket.

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