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Opened 12 years ago
Closed 12 years ago
#10787 closed defect (invalid)
RTL BUG
Reported by: | Owned by: | Hari Mahalingam | |
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Priority: | normal | Milestone: | |
Component: | general | Version: | |
Severity: | major | Keywords: | |
Cc: | Branch: | ||
Release Notes: | |||
API Changes: | |||
Internal Changes: |
Description (last modified by )
RTL Version 3982 FPGA Build version 7/27/12 release
I am working in this PPMU FPGA platfrom test. I didnot find connection REG between internal and external interrupt to CPU. There should be REG to address this port and so far I didnot find this REG. Could you help me?
Attachments (0)
Change History (2)
comment:1 by , 12 years ago
Description: | modified (diff) |
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comment:2 by , 12 years ago
Component: | project → general |
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Keywords: | PPMU removed |
Milestone: | 1.0 |
Priority: | high → normal |
Resolution: | → invalid |
Status: | new → closed |
Version: | 1.0dev |
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